by support »
Hello,
First, let's start with the notion that it doesn't matter if an endpoint or root port initiates a write (or read) operation. All entities on the bus see the same memory map view, so all writes are treated equally. This allows, for example, peer-to-peer writes (from an endpoint to another). But that's not what you asked about.
Each switch in the network, including the root port switch, is configured to route packets of certain address ranges to certain downstream ports. If none of the downstream port covers the destination address, it routes the packet towards the upstream port.
In short: Routing towards the root port is the default. In a simple setting with no switches, the processor may have a fixed address range which is covered by the PCIe switch. Any write to that range will go to the PCIe bus. This is the case in some embedded processors. It's the operating system's job to set up the BAR addresses within this range.
So answer is: If you want to write to the processor's memory in a no-operating system scenario, get the address range from the processor's memory map. Just allocate a chunk in the RAM, and make sure that the PCIe endpoint writes to its (physical) addresses.
If you have an operating system, you'll need to allocate memory and request the physical address of that memory chunk from the OS. And then pass that information to the endpoint, possibly by writing to registers, which are mapped into the BAR space.
Hope this clarified things.
Regards,
Eli
Hello,
First, let's start with the notion that it doesn't matter if an endpoint or root port initiates a write (or read) operation. All entities on the bus see the same memory map view, so all writes are treated equally. This allows, for example, peer-to-peer writes (from an endpoint to another). But that's not what you asked about.
Each switch in the network, including the root port switch, is configured to route packets of certain address ranges to certain downstream ports. If none of the downstream port covers the destination address, it routes the packet towards the upstream port.
In short: Routing towards the root port is the default. In a simple setting with no switches, the processor may have a fixed address range which is covered by the PCIe switch. Any write to that range will go to the PCIe bus. This is the case in some embedded processors. It's the operating system's job to set up the BAR addresses within this range.
So answer is: If you want to write to the processor's memory in a no-operating system scenario, get the address range from the processor's memory map. Just allocate a chunk in the RAM, and make sure that the PCIe endpoint writes to its (physical) addresses.
If you have an operating system, you'll need to allocate memory and request the physical address of that memory chunk from the OS. And then pass that information to the endpoint, possibly by writing to registers, which are mapped into the BAR space.
Hope this clarified things.
Regards,
Eli