PCIe EP tp EP

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Re: PCIe EP tp EP

Post by support » Wed Oct 17, 2018 8:44 am

Hello,

A PCIe device is just an entity on the bus that can accept bus requests (reads/writes) into its allocated BAR address space, and also generate such (that is, DMA).

How the device's registers are organized, and their meaning, is a matter of implementation of the device. While there are standardized register mappings for certain device classes (USB, Ethernet, display controllers etc), I'm not aware of any such standard setting for peer-to-peer transmissions. Not saying there is none out there.

Regards,
Eli

Re: PCIe EP tp EP

Post by Guest » Wed Oct 17, 2018 8:37 am

Hi
Thanks for the fast answer.
You answered:
"the straightforward way is that the host passes the required information to each device, typically by writing to the device's registers"
1. does it have a spesific message (code) ?
2. does it have a spesific register?
Tx
Yotam

Re: PCIe EP tp EP

Post by support » Wed Oct 17, 2018 7:46 am

Hello,

Generally speaking, it doesn't. It's the host that assigns the addresses during enumeration, and therefore each device knows only its own addresses. If peer-to-peer communication is desired, the straightforward way is that the host passes the required information to each device, typically by writing to the device's registers.

So the device knows the addresses of its neighbors because the host supplied that info.

Regards,
Eli

PCIe EP tp EP

Post by Guest » Wed Oct 17, 2018 6:07 am

Hi
How dose an EP know all others (or just one) EPs BARs (addresses/IDs)
thanks
Yotam

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