Question regarding PCIe-DMA

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Re: Question regarding PCIe-DMA

Post by support »

Hi,

You're of course right. The thing is: How do you inform the device about the addresses of the DMA buffers? The answer is that the device exposes registers. How does the host know the registers' addresses, then? Well, they are mapped on a BAR space.

Registers is in fact the most common use of the BAR space. Some devices (in particular display adapters) also use them to map memory, but this is the less common use.

Regards,
Eli

Question regarding PCIe-DMA

Post by vsagar »

In the tutorial "Down to the TLP: How PCI express devices talk (Part I)" and under the heading "Bus Mastering (DMA)", it is mentioned that "The second thing is that the driver software needs to inform the peripheral about the relevant buffer’s physical address, most probably by writing to a BAR-mapped register." What is writing BAR registers to do with DMA operation. As far as I know, BAR registers are the windows through which the system/processor is able to do read/writes to the memory that is exposed/available in the PCIe device. Where as for DMA, we have to enabling bus mastering capability in the PCIe command register, inform the device, the bus address from where it has to do read/write DMA. Please correct me if I'm wrong.

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