by support »
Hello,
I'm not sure if this is the right place to ask this question. It seems like it's about IP packaging, and not so much about Xillybus itself.
Anyhow, you didn't mention what part you decided to package as an IP, but it seems like you picked the xillybus module for that. In your case, I would go for the entire design: Turn xillydemo (the toplevel module) into the IP.
After all, the Xillybus demo bundle is just a design with some HDL, constraints, a netlist file and a PCIe block. If you package that, all toplevel ports should turn into the IP's port. So that should include the PCIe pins, clock, reset and the LEDs.
If you want the packaged IP to interact with the other blocks, you can add other toplevel ports, which turn into the new IP's interface ports.
Frankly speaking, I don't know how well it will work. Never tried IP packaging for real myself. The thing to look out for is if attributes or constraints are lost on the way. This is the typical caveat of those magic tools.
For example, you mentioned that the netlist couldn't be found. Maybe it's because the search part for netlists is a property of the xillydemo project, so that wasn't propagated into the packaged IP (which kind-of makes sense). So all you need to do is to make sure that your xillybus_core.ngc/.edf file is in the "macro search path" (or something like that) in the new main project.
Regards,
Eli
Hello,
I'm not sure if this is the right place to ask this question. It seems like it's about IP packaging, and not so much about Xillybus itself.
Anyhow, you didn't mention what part you decided to package as an IP, but it seems like you picked the xillybus module for that. In your case, I would go for the entire design: Turn xillydemo (the toplevel module) into the IP.
After all, the Xillybus demo bundle is just a design with some HDL, constraints, a netlist file and a PCIe block. If you package that, all toplevel ports should turn into the IP's port. So that should include the PCIe pins, clock, reset and the LEDs.
If you want the packaged IP to interact with the other blocks, you can add other toplevel ports, which turn into the new IP's interface ports.
Frankly speaking, I don't know how well it will work. Never tried IP packaging for real myself. The thing to look out for is if attributes or constraints are lost on the way. This is the typical caveat of those magic tools.
For example, you mentioned that the netlist couldn't be found. Maybe it's because the search part for netlists is a property of the xillydemo project, so that wasn't propagated into the packaged IP (which kind-of makes sense). So all you need to do is to make sure that your xillybus_core.ngc/.edf file is in the "macro search path" (or something like that) in the new main project.
Regards,
Eli