The Xillybus Forum

Hello,

In essence, it depend on whether that X is constant for a session, or if it changes between each workload.

If it's constant, the simplest way is to dedicate a separate stream for setting it. The logic just says something like

Code: Select all

always @(posedge clk)
   if (xillybus_x_wren)
      X <= xillybus_x_data;


so the host just sends a word to set up X.

If X changes for each workload, you might send the X for each assignment in a different stream for convenience, or set up some simple packet structure, in which, for example, X is the first element, and the other elements consist of data.

Hope this gave a direction.

Regards,
Eli

Hi Eli,

This is not a question directly about xillybus but how to use xillybus framework better.

Saying that I am using it for speed up computation using mixture of PC and FPGA, in many high level function, the structure of the computation is dependent on other variables. For example, I have a filter bank contains X FIR filters, the X is unknown during FPGA compiling and I want to download the X to the xillybus memory register during runing. This cannot be synthesized because X is not known yet. However, this type of computation is ubiquitous, another example would be matrix multiplication but its shape is not decided during compiling so I want to keep it as a variable that can be downloaded with xillybus. I am wondering how this can be efficiently done within xillybus framework?

Thanks!

Best,
Chongxi