by support »
Hello,
Xillybus works on any Linux platform that supports PCIe properly. Nvidia ARM processors have been used with no issues for several years, but I don't keep a track on exactly which -- as this it pointless. It just works.
As for the pipe -- /dev/xillybus_read_32 (or any other name you may choose) is simply a pipe of the data that you've pushed into the FIFO on the FPGA side, and its I/O interface follows common UNIX conventions for reading from a file. So if you just open the device file and read from it like any device file, it's fine.
Note however that per UNIX convention, a read() call may return less bytes than required, and Xillybus' device files follow this. The Linux Programming Guide at the website's documentation section elaborates on this. As far as I know, a read from /dev/video0 doesn't return with a partial read, so there might be a difference there.
Also, I suppose you have a lot of ioctl()s on the /dev/video0 file, that don't apply on a Xillybus device file.
So it seems like some minor changes are due, but in principle it will be the same.
Regards,
Eli
Hello,
Xillybus works on any Linux platform that supports PCIe properly. Nvidia ARM processors have been used with no issues for several years, but I don't keep a track on exactly which -- as this it pointless. It just works.
As for the pipe -- /dev/xillybus_read_32 (or any other name you may choose) is simply a pipe of the data that you've pushed into the FIFO on the FPGA side, and its I/O interface follows common UNIX conventions for reading from a file. So if you just open the device file and read from it like any device file, it's fine.
Note however that per UNIX convention, a read() call may return less bytes than required, and Xillybus' device files follow this. The Linux Programming Guide at the website's documentation section elaborates on this. As far as I know, a read from /dev/video0 doesn't return with a partial read, so there might be a difference there.
Also, I suppose you have a lot of ioctl()s on the /dev/video0 file, that don't apply on a Xillybus device file.
So it seems like some minor changes are due, but in principle it will be the same.
Regards,
Eli