Spec of memory map of Xilinux bundle demo package

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Re: Spec of memory map of Xilinux bundle demo package

Post by Guest » Tue Sep 26, 2017 7:16 am

Hi, Eli,

Thanks for the reply. What I asked the question was motivated by the following description in chap 4.4 in xillybus_getting_started_linux.pdf.

Would you please help to clarify the following question ?

Q1: For the following description, does it mean to display the content of the xillybus's FIFO in FPGA which xillybus_mem_8 uses ?

Before writing to the memory, the current situation is observed by using the hexdump
utility:
$ hexdump -C -v -n 32 /dev/xillybus_mem_8
00000000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000020

Q2: What's the size of the FIFO ? 8 x 2048 bits ?



Q3: For the following description, does it mean to write values to the xillybus's FIFO with the address 3-170 in FPGA which xillybus_mem_8 uses ? is each address like either address 3 or 170 is 8 bits i.e. one byte ?


Changing the value of the memory at address 3 to 170 (0xaa in hex):

$ ./memwrite /dev/xillybus_mem_8 3 170

And read the entire array again:

$ hexdump -C -v -n 32 /dev/xillybus_mem_8
00000000 00 00 00 aa 00 00 00 00 00 00 00 00 00 00 00 00 |...ł............|
00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000020

[color=#0000FF]
Q4: If I don't see the device files xilibus_mem_32_* under 7dev but has xillybus_mem_8_*, is it normal ? How to get the xilibus_mem_32_* ??

Re: Spec of memory map of Xilinux bundle demo package

Post by support » Tue Sep 26, 2017 6:43 am

Hello,

There is no need for a memory map -- Xillybus' driver handles the low-level communication.

Please follow the "Hello World" example in the Getting Started guide to get an idea on how to use the device files for communicating with the hardware.

Regards,
Eli

Spec of memory map of Xilinux bundle demo package

Post by Guest » Fri Sep 22, 2017 11:36 am

Hi, dear Xilinux elites

I want to develop co-processor HW in FPGA and co-work with Xilinux host in ZYBO which using the Xilinux bundle demo package.

Where can I find the spec of available memory map of the Xilinux to develop related HW interface and test code in linux host which can read/write to the address of co-processor resides ?

All the best,
Nan-Sheng

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