The Xillybus Forum

Hello,

The next step is to write logic in Verilog or VHDL that samples the data from the ADC and writes each sample to a FIFO in the FPGA that is connected to the Xillybus IP core on its other side. Once you have this set up, you can copy the data into a file on the host with something like:

cat /dev/xillybus_read_32 > samples.dat

Getting the logic working correctly is usually the difficult part of the project, however it's out of this forum's scope. I suggest turning to Xilinx' or Intel's forums for assistance on these matters.

Regards,
Eli

Hi,I want to connect the ADC and xillybus ip together but could not do it on my own or the tutorials.do I need a new ip core.?adc sends 16 bit data. And how do I run the ADC or will it work on its own.
I want to save the values from adc in a text file.
Xillybus loop back works fine.
Mmap writes to text file.
What do I do next.
Please help.
Any help is greatly appreciated.
Thank you.