by support »
Hello,
The suggested flow for learning about Xillybus is to download the demo bundle (and driver if necessary), and to try it out, following the relevant guides. It's a fairly quick process, and after playing around a bit with it, most people have an idea about how to use it for their application.
The documentation is written with this flow in mind. Alone, it might indeed appear to be lacking.
The IP core indeed supplies just FIFOs and memory/address interfaces. It's up to each to write the glue logic for the desired application. The usage options in the IP Core Factory are merely intended to configure the stream to work intuitively in the context of a specific use, but this doesn't change the interface. The function and signals are same for all, only with a slightly different behavior (which is documented).
As for AXI Lite master, Xillybus offers no specific interface for that.
Regards,
Eli
Hello,
The suggested flow for learning about Xillybus is to download the demo bundle (and driver if necessary), and to try it out, following the relevant guides. It's a fairly quick process, and after playing around a bit with it, most people have an idea about how to use it for their application.
The documentation is written with this flow in mind. Alone, it might indeed appear to be lacking.
The IP core indeed supplies just FIFOs and memory/address interfaces. It's up to each to write the glue logic for the desired application. The usage options in the IP Core Factory are merely intended to configure the stream to work intuitively in the context of a specific use, but this doesn't change the interface. The function and signals are same for all, only with a slightly different behavior (which is documented).
As for AXI Lite master, Xillybus offers no specific interface for that.
Regards,
Eli