by support »
Hello,
I know for a fact that deepfifo has been used in quite a few projects, only judging by those who turn up with questions. And I'm probably seeing just the tip of the iceberg. So had there been a problem as serious as you describe with deepfifo, I should have known about it long ago.
The only thing I can suggest is to double-check the instantiation parameters (in particular log2_word_width, which I guess should be 8 as you use a 256 bit interface). But then comes the question why the simulation ran so nicely.
Other than that, I would suggest writing a small module that issues the same bursts to the MIG controller and see what happens.
You mentioned that in the previous design the memory was shared by a processor's memory map. So there was some AXI switch involved, I guess. Maybe it fixed something that doesn't get fixed now. Just a wild guess.
When you find the problem, please come back and write about it. I'm really curious what's going on.
Regards,
Eli
Hello,
I know for a fact that deepfifo has been used in quite a few projects, only judging by those who turn up with questions. And I'm probably seeing just the tip of the iceberg. So had there been a problem as serious as you describe with deepfifo, I should have known about it long ago.
The only thing I can suggest is to double-check the instantiation parameters (in particular log2_word_width, which I guess should be 8 as you use a 256 bit interface). But then comes the question why the simulation ran so nicely.
Other than that, I would suggest writing a small module that issues the same bursts to the MIG controller and see what happens.
You mentioned that in the previous design the memory was shared by a processor's memory map. So there was some AXI switch involved, I guess. Maybe it fixed something that doesn't get fixed now. Just a wild guess.
When you find the problem, please come back and write about it. I'm really curious what's going on.
Regards,
Eli