Transaction layer

Comments and questions to the author of the "Down to the TLP" posts (Eli Billauer)

Transaction layer

Postby Guest » Wed Mar 06, 2013 6:23 am

Hello eli,

I am reading about transaction layer for PCI express generation 3.0.
I read 2-3 manuals but they are confusing me for the actually inputs for transaction layer from application layer or software layer.

Can you tell me what are the input(s) for transaction layer?

Awaiting for your reply

Regards,
Maitrik
Guest
 

Re: Transaction layer

Postby support » Wed Mar 06, 2013 7:51 am

Hi,

Well, the input to the transaction layer is TLPs. How to send them or receive them is a question of the FPGA family (or ASIC library) you're working with. For example, Xilinx present an AXI-stream interface, Altera use their Avalon interface. But in the end of the day, the application logic creates or dissects TLPs.

I hope this helped somehow.
Eli
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Re: Transaction layer

Postby Guest » Tue Mar 12, 2013 1:29 pm

Thanks for your help eli.
My another doubt is what happens if I don't consider Ordered set in my design?
Will it effect or it will remain same as it is?

Regards,
Maitrik
Guest
 

Re: Transaction layer

Postby support » Tue Mar 12, 2013 2:24 pm

I suppose that you're considering allowing relaxed ordering of the packets.

Ths short answer is: Keep it ordered. The performance benefit of relaxed ordering will be negligible, and the bus will behave in a counterintuitive way. It may not make a difference, because the hardware may never need to reorder packets against the strict rules.

Eli
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Joined: Tue Apr 24, 2012 3:46 pm


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