The Xillybus Forum

Hi,
Can you please elaborate on the need for steering tag? What does it convey to any PCIE device?

This is a feature new to PCIe-3.0, which allows a more efficient processing of a TLP. It's part of the TPH (TLP Processing Hints) field, which is enabled only if the TH flag is set in the TLP's header.

The exact meaning of this field is best understood from the standard itself. I would need to more or less copy some parts of it to here to answer your question fully. The idea, anyhow, is to give the low-level infrastructure hints about the packet's nature, so different packets can be handled according to their needs. Mostly reducing latency when applicable.

Eli