pcie dma sdram

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Re: pcie dma sdram

Postby Guest » Sun May 04, 2014 11:57 am

Hi
I click the hexdump.exe in the unixutils package and type the command > hexdump -C -v -n 32 \\.\xillybus_mem_8
the result is
------------------------------------------------------------------
0000000 203e 6568 6478 6d75 2070 432d 2d20 2076
0000010 6e2d 3320 2032 5c5c 5c2e 6978 6c6c 6279
------------------------------------------------------------------
then in the SDK I type the command > memwrite \\.\xillybus_mem_8 3 170
After that I opened a new hexdump.exe and type > hexdump -C -v -n 32 \\.\xillybus_mem_8
But it come out the same result as before. I can't see any change like the example.
And I don't know the command about the hexdump.
By the way if the xillybus_mem_8 is too slow what other method could I use?
Colin
Guest
 

Re: pcie dma sdram

Postby support » Sun May 04, 2014 2:49 pm

Hi,

It took me some time to figure out what happened there. Please don't click hexdump.exe and type the text. Rather, open a DOS window and type the hexdump command line. What you did was feeding the hexdump program with the string you typed in, so it returns the ASCII representation of what you typed (as 16 bit words). Xillybus was never involved here.

And by the way, don't type the ">" sign. It's shown in the docs to represent the DOS prompt.

Regards,
Eli
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Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm

Re: pcie dma sdram

Postby Guest » Sun May 04, 2014 4:02 pm

Hi~
Thank you for your reply
I'm sorry to ask such a low-level issues :D
You say that the mem_8 interface is slow~Then if I want to read from SDRAM or send DATA from SDRAM to the PC'mem.
What part should I modify?Do you have any suggestion?
This problem have trouble me monthes.
By Colin
Guest
 

Re: pcie dma sdram

Postby support » Sun May 04, 2014 5:31 pm

Hi,

The issue with mem_8 is that it's a synchronous interface, and it has 8 bits width. That makes it slow.

I suggest that you'll take a look at the documentation and also try to interact with Xillybus with your own logic. FPGA design is not a simple field, and it looks like there's a quite a way for you to go. At a minimum, you should be able to master synchronous RTL design, and understand how to interact with a standard FIFO. Once you'll master FPGA design at a reasonable level, it will be quite clear to you how to get on.

Regards,
Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm

Re: pcie dma sdram

Postby Guest » Mon May 05, 2014 2:57 am

Hi eli
Thank you for your reply~I will try to learn more form the documentation.
I still don't quite understand the differences of those 6 files (eg. memread.c streamread.c fifo.c)
If I want to realize my function ,then which file should I connect?
I don't know if you could understand me...
By Colin
Guest
 

Re: pcie dma sdram

Postby support » Mon May 05, 2014 4:18 am

Hi,

The programming guides explain the principles behind the sample C programs. Needless to say, working with Xillybus requires mastering C programming and FPGA design at some level, so if there are some gaps to fill, maybe start with that.

Regards,
Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm

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