Lane-to-lane skew implementation

Comments and questions related to the "Down to the TLP" pages

Lane-to-lane skew implementation

Postby Guest » Thu Jun 12, 2014 1:51 pm

Hi Eli,

Thank you for your great efforts in responding to our doubts. Your help is valuable to us. I have question for you about the lane de-skew delay circuit. I cannot understand why is this circuit necessary. Cannot we just pop out the byte from the elastic buffers as soon as the byte is available in the elastic buffers of all lanes using some control signals? If this is implemented, even if the skew of the lanes change, the byte-popping out delay would dynamically change to adapt to the new skew. Is there something I am missing, or is this design valid?

Thanks!
Guest
 

Re: Lane-to-lane skew implementation

Postby support » Thu Jun 12, 2014 2:17 pm

Hello,

It depends on what you're working on. If you're doing the rock-bottom level interface for a PCIe link, it's possible that the bits in a single "popped" word will belong to different words as were sent from the transmitter, if the skew between the lanes exceeds the symbol clock rate. In that case, there's a need to fix this with some logic circuitry. For example, in a 5 GT/s link, a skew of 0.2 ns is enough to require deskewing logic.

On the other hand, if you're working with a PCIe core from some hardware vendor, you don't need to worry about this at all. This deskewing has been done for you.

Regards,
Eli
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Re: Lane-to-lane skew implementation

Postby Guest » Thu Jun 12, 2014 3:02 pm

ok great. Lets talk about the rock-bottom level interface for a PCIe link. Let us assume that the skew between the lanes exceeds the symbol clock rate. Lets think of the elastic buffer as a dual clock FIFO. We can pop out words from the elastic buffers as soon all the FIFOs have a ready byte. The logic necessary would be simply the signal indicating whether data is available or not. This design seems sufficient to tolerate dynamic lane-skew variation. On the contrary, the specs and most of the resources on the internet state that a delay circuit that imposes static configurable delay is necessary. Are you following?
Guest
 

Re: Lane-to-lane skew implementation

Postby support » Thu Jun 12, 2014 3:09 pm

Hi,

I'm afraid I can't help much on this, because I never needed to implement anything this low-level. I can unfortunately only direct you to the spec in general. I'm not familiar with the parts dealing with the physical layer.

Regards,
Eli
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Re: Lane-to-lane skew implementation

Postby Guest » Thu Jun 12, 2014 3:13 pm

Thanks anyway! I appreciate your time!
Guest
 


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