FPGA to Host Debugging Problems

Comments and questions related to the "Down to the TLP" pages

FPGA to Host Debugging Problems

Postby Guest » Mon Jun 16, 2014 6:26 pm

Hi,

I'm attempting to design a system for fpga to host traffic on a linux platform using a Xilinx vc709 board.

Using chipscope, I've verified that that the hardware is performing as expected and I can see transmit credits being consumed.

However, when trying to read the data on the linux host I find that the expected data is not present. My conclusion is that the problem must
be on the driver side.

One thing I noticed is that when I provide the virtual address (obtained from the __get_free_pages function) to the pci_map_single function
it returns the same value for the dma address as was given as the virtual address.

Is this expected behavior? Does anyone have any advice on the best way to debug at this stage?

Thanks in advance, I've found the information on this site very helpful!

Matt
Guest
 

Re: FPGA to Host Debugging Problems

Postby support » Mon Jun 16, 2014 6:43 pm

Hello,

First some shameless self-promotion: Have you considered Xillybus' IP core? It doesn't fit all scenarios, but if it does, it will solve you some work...

Now to your question: There's nothing inherently wrong with a virtual address that happens to be the same as the physical one. On many platforms, this is the default behavior. There's no reason to suspect that pci_map_single() didn't work correctly. On almost all platforms, it's a can't-fail function, that just calculates the physical address from the virtual one, which is often just an offset. Which can be zero.

So I don't share your conclusion that the problem is necessarily with the driver. The packet could be malformed, even if it appears to be OK. Another issue I would look at is cache synchronization. If your platform is x86-based, this will not pose a problem, but many other architectures, in particular ARM, require a proper cache invalidation, or you may read rubbish even though the data has arrived on the DDR memory.

Hope this helps.
Eli
support
 
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