CPU and PCIE interface

Comments and questions related to the "Down to the TLP" pages

CPU and PCIE interface

Postby Guest » Wed Dec 24, 2014 7:21 am

Hi,

Framing TLP have some fields like fmt,type, etc......how to get these values by PCIE Rootcomplex.
Who will give these values
1: CPU directly
2: CPU writes these values in pcie configuration register and root
complex use these values.

Thanks in advance.

Regards,
Mohamed RA.S
Guest
 

Re: CPU and PCIE interface

Postby support » Wed Dec 24, 2014 7:40 am

Hi,

The CPU uses the PCIe bus by issuing requests to read or write data. The fields in the TLP frame are populated by the bridge between the processor's internal bus and the PCIe bus. Accordingly, the CPU has no access to their content, and can't control their values (maybe there's a CPU or two out there which does allow such direct access, but none that I know of).

Regards,
Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm


Return to General PCIe

cron