PCIE Lane

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PCIE Lane

Postby Guest » Thu Jan 22, 2015 6:46 am

Hi,

PCI Express have x8 lanes.....If lane 2 is not working then is it possible
Lane 4,5,6,7 are act as a Lane 0,1,2,3 (i.e., x4 lane) ?

Regards,
SmRa
Guest
 

Re: PCIE Lane

Postby support » Thu Jan 22, 2015 7:14 am

Hello,

It depends, of course, on which hardware you're using for implementing PCIe.

One interesting possibility is lane reversal, which is supported by many devices. You may change lanes 0, 1, 2, ..., 7 into 7, 6, 5, ..., 0. Your faulty lane 2 is now lane 5, so the width negotiation will opt for x4 with lane reversal.

Regards,
Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm

Re: PCIE Lane

Postby Guest » Thu Jan 22, 2015 8:18 am

Hi,

If lane reversal was not implemented in PCI Express(optional) and lane 2 is not working then is it possible
Lane 4,5,6,7 are act as a Lane 0,1,2,3 (i.e., x4 lane).
Thanks in advance.

Regards,
SmRa
Guest
 

Re: PCIE Lane

Postby support » Thu Jan 22, 2015 9:21 am

Hello,

Again -- what is possible and impossible depends on what you have on both sides of the link. What's the scenario?

Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm

Re: PCIE Lane

Postby Guest » Thu Jan 22, 2015 9:46 am

Hi,
The scenario is x8 PCIE lane(no lane reversal),
1: lane 0,lane 2,lane 7 is not working then root complex train the link as x4 used
i.e., lane 1,3,4,5 act as lane0,1,2,3 .Is it correct?

2: lane 3 is not working then root complex train the link as x4 used
i.e.,lane 4,5,6,7 act as lane 0,1,2,3. Is it correct?

3: lane 3 is not working then root complex train the link as x2 used
i.e.,lane 0,1 act as lane 0,1, and all other lanes are inactive. Is it correct?

Regards,
SmRa
Guest
 

Re: PCIE Lane

Postby support » Thu Jan 22, 2015 9:52 am

Hi,

Could you please explain your situation better? What hardware do you have on either side? What's the project?

Generally speaking, the data link layer expects a continuous set of lanes, so it won't skip a lane that doesn't work. There may be ways to come around this, but it's impossible to consider that without knowing what you have on either side of the PCIe link.

Regards,
Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm

Re: PCIE Lane

Postby Guest » Thu Jan 22, 2015 10:15 am

Hi,

For developing PCIE rootcomplex.
In x8 lanes,
lane 0 and lane 7 was inactive.All other lanes(lane 1 to 6) was active.
What is behavior of PCIE in assigning lane numbers ?

Thanks,
SmRa
Guest
 

Re: PCIE Lane

Postby support » Thu Jan 22, 2015 10:32 am

Hello,

If physical lanes 0 and 7 don't work, you're stuck. So the question is if there's a way to work around this in a somewhat creative manner.

Since you don't say anything about what hardware you're implementing on, it's impossible to help you.

Eli
support
 
Posts: 760
Joined: Tue Apr 24, 2012 3:46 pm


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