Question?

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Question?

Postby guyprotection » Thu Apr 23, 2015 6:23 am

In PCIe specification, one DWORD is 32-bit. Assume a 128-bit endpoint, how can a root send a write packet of 2 128-bit words?
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Re: Question?

Postby support » Thu Apr 23, 2015 6:31 am

Hello,

The 32-bit size of the DWORD is related to the TLP formation. That has to do with how the data runs on the actual bus.

As for the 128-bit endpoint, it's no different from any other endpoint. It's just that its interface with the user logic has a 128-bit wide data vector in order to facilitate data transfers at very high rates.

So it all boils down to how those DWORDs are packed in the 128-bit vector, which differs from one PCIe front end to another (and is often configurable). Please refer to your PCIe block's user manual for that piece of info.

Regards,
Eli
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