Hi Eli,
Firstly, thank you for taking the time to write the "Down to the TLP" blogs. They've been extremely helpful in understanding how it all works.
I have two PCIe cards, each with Altera FPGAs on them with their PCIe HIP / DMA reference design in them. I can DMA to and from each device perfectly. Both devices (let's call them device1 and device2) have the DMA controller(s) in BAR 0 and 4K of SRAM in BAR 2. From the host, I can DMA to and from the SRAM (to/from host memory). I verify the data by inspecting BAR 2. I then tried to DMA from device1's SRAM to the physical address of device2's bar2 mapping. From what I've read, this should be legal.. ? It actually works as long as the dma length is one single 32-bit word. If i increase it, even to 2, it hangs the system. Can you think of any reasons why this might not work? The DMA turns into a write (from device1) to host physical memory (so the ID would be for the host, not for device 2), I assume? Is that the problem? Any insight greatly appreciated! Thank you!