Completer ID

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Completer ID

Postby Guest » Sat Jun 11, 2016 5:19 am


In completion packet there is a field completer ID. How and when is this completer ID assigned to the endpoint?

Thanks and regards

Re: Completer ID

Postby support » Sat Jun 11, 2016 6:49 am


According to the PCIe spec, the completer ID is the combination of a Completer's Bus Number, Device Number, and Function Number ("bus address") that uniquely identifies the completer of the request.

The completer ID is assigned to an endpoint as a side effect during enumeration: The owner of the root port (the host, e.g. a PC's processor) does this by sending configuration write TLPs to the endpoints, among others for setting the BAR addresses etc. The PCIe spec requires that the endpoints captures the bus address supplied with all (Type 0) configuration write requests that are sent towards it.

In other words, since the configuration write requests are routed towards the endpoint by bus address, and the packet itself contains this address, the endpoint can and must learn its bus address from each such packet. If you got a packet with address X, that must mean your address is X. As a matter of fact, since the bus address may change on run time, it must capture its address from each such packet arriving.

The root port itself has the completer ID zero, so it doesn't need anyone to assign it.

On a PC, the BIOS is almost always the software that takes care of this very soon after a reset or powerup (recall that the graphics card is a PCI/PCIe device, so it has to be set up before anything can be shown on the screen).

In PCIe IP blocks supplies by FPGA vendors there's always a port, which holds the Completer ID's value, so to an FPGA designer it's a given value.

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