PCIe "routing"

Comments and questions to the author of the "Down to the TLP" posts (Eli Billauer)

PCIe "routing"

Postby Guest » Thu Nov 24, 2016 5:25 pm

Hi, thanks for your article it is usefull.
Could I suggest to add details about these points, for example when cpu write data on device memory.
- How pkt is routed to the endpoints?
- How PCIe switch are configured to be able to know where pkt with that destination memory address has to be sent?
Thanks for your help
Alessio
Guest
 

Re: PCIe "routing"

Postby support » Thu Nov 24, 2016 5:47 pm

Hello,

I'm glad you found the tutorial useful. I'll consider adding a section on routing, as this is the second time I'm asked about it.

I suppose you'll find the answer is this thread:

http://forum.xillybus.com/viewtopic.php?f=2&t=409

Regards,
Eli
support
 
Posts: 514
Joined: Tue Apr 24, 2012 3:46 pm

Re: PCIe "routing"

Postby Guest » Fri Nov 25, 2016 7:54 am

Thanks, it is the "expected" behavior but I just need to read it too:)
Thanks for your help
Guest
 


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