How can I send a packet of more than 1 DWORD(s)

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How can I send a packet of more than 1 DWORD(s)

Postby ashar »

In PCIe specification, one DWORD is 32-bit. Assume a 128-bit endpoint, how can a root send a write packet of 2 128-bit words? Similarly can I send a read request of more than 2 128-bit words?

As of now, I am using a kernel function , iowrite32 that sends one DWORD request to endpoint. The idea is to improve write efficiency of rootport such that it sends one packet for N consecutive writes of DWORD size, e.g. an entire device register file can be written or read in one go.

Thanks,
Ashar
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Re: How can I send a packet of more than 1 DWORD(s)

Postby support »

Hi,

Well, the short answer is that you can't. To get an efficient utilization of the PCIe bandwidth, you need to use DMA.

I have had people reporting that two consecutive 32-bit writes were fused into a single write TLP packet by the root port. This is something the bridge is allowed to do, but as far as I know, there is no way to force it doing so. The underlying idea in designing the relevant chipsets is not to waste efforts optimizing data transmissions initiated by the host, since they're only intended for control.

You may try tricking the processor into sending a burst by e.g. making the relevant memory region cacheable and invalidate or flush the cache. But I don't know if that's even possible or if that would help.

So again, the bottom line is simple: The tool for what you want is DMA, and I will be delighted to hear from you again if you manage to speed up things somehow without that.

Eli
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Re: How can I send a packet of more than 1 DWORD(s)

Postby Guest »

I managed to get a DMA engine up and running without much trouble by modifying the example design that comes with the Xilinx Spartan 6 PCIe core. All you have to do is switch replies and requests around, so instead of the host writing to you, you make a read request to the host and it replies with multi DWORD replies (subject to limits such as max payload size)
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Re: How can I send a packet of more than 1 DWORD(s)

Postby support »

Indeed, that is the way to go. I suppose that you made a register in the FPGA which the host writes to, saying "now read a packet of data from me at address X and give me an interrupt when you're finished". With X being the address written to the register.

I hope that you're aware that the completion can be split into several TLPs by the host, if the data segment crosses 64 byte boundaries.
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