FPGA gives a "unknown header type 7f" with lspci command

Questions and discussions about the Xillybus IP core and drivers

Re: FPGA gives a "unknown header type 7f" with lspci command

Postby support »

Hello,

The error you report occurs before Xillybus' logic gets a say: The lspci detection is a matter between Xilinx' PCIe block and the operating system. Therefore, the problem lies somewhere in the region of the IP core itself and the timing constraints. I can't see anywhere else where it would hide.

The fact that you've taken the PCIe block and generated an example project from it, and that went fine, doesn't leave a lot of room. Just to be sure, please diff the XCI files of the PCIe block in the bundle and that in the example project that worked. I would expect them to be identical, except for the name of the IP. If not, what are the differences?

You mentioned using the constraints from the example project directly, and that it didn't work. Well, it shouldn't. Note that section 4.5.4 in the said Getting started guide doesn't tell you to copy the constraints, but you're supposed to adapt them, editing the paths to the signals. Maybe you missed this little delicate point?

Regards,
Eli
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Re: FPGA gives a "unknown header type 7f" with lspci command

Postby Guest »

Ok, after a few days of trial and error, I've managed to solve the problem!

In section 4.5.3 of the document pointed by Eli, it states: "the PCIE_LANE parameter in xillybus.v is larger than the example design’s, there is
no problem leaving it that way, and it’s often easier to do so". This is not true!

I had to modify the PCIE_LANE parameter in xillybus_block.v in the demo bundle and regenerate the Vivado project using xillydemo-vivado.tcl

Works like a charm after that :)

Thanks Eli for pointing me in the right direction! I would suggest modifying that section of the document.
Guest
 

Re: FPGA gives a "unknown header type 7f" with lspci command

Postby support »

Just a small piece of information, that doesn't necessarily help with the original problem:

"Unknown header type 7f" seems to be the result of a no-response from the FPGA to the host's request of the configuration register information. So the situation is probably that the FPGA was enumerated properly, but then stopped to respond later, or didn't respond properly. Maybe it was in a low-power state and didn't wake up properly, or some other kind of mishap.

So there's a whole variety of reasons for this to happen.

Eli
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