Xillybus bandwidth can't reach more than 75MB/s

Questions and discussions about the Xillybus IP core and drivers

Re: Xillybus bandwidth can't reach more than 75MB/s

Postby support »

Hi,

Just a final check: The bundle's readme file requires that ISE 13.1 is used to generate Xilinx' PCIe IP core (so that the version of PCIe Block Plus generator is 1.14). Just wanted to confirm that you followed that.

Regards,
Eli
support
 
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