Dear Eli,
I'm interested in using Xillybus for a FFT spectropolarimeter application (at our institute's radio observatory). I'll be using a ML505 board which has a single lane PCIe, which I'll be connecting to the PCIe via a PCIe extender Cable. On the front-end is a AD9286 and AD9284 ADCs to stream digitized data from the antennas. I have a 3 channel streaming 16384 point real FFT running in the FPGA (out of which I'll take only the positive half spectrum), from which I get the spectrum of the 3 antennas, which I correlate to obtain the polarized spectrum. I'd be getting 4 spectrum products at intervals of typically 10 ms. I'd be writing 8192 points into 4 FIFOs every 10 ms (this value may vary from 1ms to ~100ms). For this purpose I customized my core as follows in the IP Core factory:
xillybus_read_32 32 bits 195 MB/s No Asynchronous, 4 x 16 kB = 64 kB Data acquisition / playback
xillybus_write_32 32 bits 180 MB/s No Asynchronous, 2 x 16 kB = 32 kB DMA acceleration: 4 segments x 512 bytes Data acquisition / playback
xillybus_read_8 8 bits 1 MB/s Yes General purpose
xillybus_write_8 8 bits 1 MB/s Yes General purpose
xillybus_mem_8 8 bits 102.400 kB/s Yes Address/data interface (5 address bits)
(host to FPGA) 8 bits 102.400 kB/s Yes Address/data interface (5 address bits)
This generates 2 warnings:
xillybus_read_32: This stream can generate about 12400 interrupts per second to the host, which may degrade its performance. An interrupt is sent every time a DMA buffer is filled or emptied. It's therefore recommended to make each DMA buffer larger.
xillybus_write_32: This stream can generate about 11500 interrupts per second to the host, which may degrade its performance. An interrupt is sent every time a DMA buffer is filled or emptied. It's therefore recommended to make each DMA buffer larger.
Is this configuration ok for my application ? Is there a technique to bypass the warnings ? Is there a more optimum setting?