Tandem PCIe - MCAP
Posted:
Hello,
I am experimenting with your xillybus Core + Windows Driver. When used without Tandem Configuration everything works fine.
However, when used with Tandem PCIe in combination with the new MCAP Interface for Ultrascale Devices,
after programming Stage 2 Bitream (which contains Xillybus), the Windows Driver Indicates "No Response from FPGA. Aborting."
Since the MCAP uses the Xilinx driver, the process is as follows:
1. Switch to MCAP Driver
2. Configure Stage 2 Bitstream using MCAP
3. Switch back to Xillybus Driver
The FPGA CONFIG_STATUS register indicates that configuration is done and the PXIe Core is also responsive.
As far as i know, the Windows driver is not open source, so i took a quick look at the Linux Driver.
It seems like "xillybus_endpoint_discovery" function times out waiting for the XILLYMSG_OPCODE_QUIESCEACK opcode MSI response from the FPGA.
So i am pretty sure the probing works similar on windows.
However, when Vivado is used to configure the Stage 2 instead of the MCAP Driver, everything works fine.
Also if a warm-boot is performed after a MCAP Bitstream write process, the xillybus driver works as expected again.
My rough guess is that the common ground is the PCIe core and how it is used/configured by the two drivers.
I would appreciate if you could give the problem a thought.
I am experimenting with your xillybus Core + Windows Driver. When used without Tandem Configuration everything works fine.
However, when used with Tandem PCIe in combination with the new MCAP Interface for Ultrascale Devices,
after programming Stage 2 Bitream (which contains Xillybus), the Windows Driver Indicates "No Response from FPGA. Aborting."
Since the MCAP uses the Xilinx driver, the process is as follows:
1. Switch to MCAP Driver
2. Configure Stage 2 Bitstream using MCAP
3. Switch back to Xillybus Driver
The FPGA CONFIG_STATUS register indicates that configuration is done and the PXIe Core is also responsive.
As far as i know, the Windows driver is not open source, so i took a quick look at the Linux Driver.
It seems like "xillybus_endpoint_discovery" function times out waiting for the XILLYMSG_OPCODE_QUIESCEACK opcode MSI response from the FPGA.
So i am pretty sure the probing works similar on windows.
However, when Vivado is used to configure the Stage 2 instead of the MCAP Driver, everything works fine.
Also if a warm-boot is performed after a MCAP Bitstream write process, the xillybus driver works as expected again.
My rough guess is that the common ground is the PCIe core and how it is used/configured by the two drivers.
I would appreciate if you could give the problem a thought.