Doesn't XADC get along with Xillybus?

Questions and discussions about the Xillybus IP core and drivers

Doesn't XADC get along with Xillybus?

Postby gutielo »

Hello! When using XADC + Xillybus, I open Hardware Manager in Vivado just to monitor the XADC. Temperature is always -273.1ºC and volts in VAUX0, VAUX8 and VP/VN is always 0.00. When I run this tutorial (which doesn't use Xillybus or any other embedded OS at all) I use the Hardware Manager again to monitor and everything seems fine, temperature is at 30ºC and volts in VAUX0 looks great (even change when I put my finger on the pins, as expected). So I am starting there must be something wrong with the combo XADC + Xillybus or maybe I'm not accesing the XADC properly? Although the XADC seems to convert, but it looks like it's always converting the same thing (although values change a little, implying is not stuck in the same result forever) and I'm always getting values like 0080, 0081, 007F and so.

Do you have any clue on what might be causing this? I'm currently connecting the EOC signal of the XADC to the DEN of the XADC to output values and the CHANNEL signal to the DADDR ("00" & CHANNEL, since CHANNEL is only 5 bits and DADDR is 7 bits wide) as proposed in the XADC doc.

This is what I added to the xillydem.xdc:

Code: Select all
set_property -dict "PACKAGE_PIN L11 IOSTANDARD LVCMOS33" [get_ports "vp_in"];
set_property -dict "PACKAGE_PIN M12 IOSTANDARD LVCMOS33" [get_ports "vn_in"];
set_property -dict "PACKAGE_PIN E16 IOSTANDARD LVCMOS33" [get_ports "vauxn0"];  # "XADC-AD0N-R"
set_property -dict "PACKAGE_PIN F16 IOSTANDARD LVCMOS33" [get_ports "vauxp0"];  # "XADC-AD0P-R"
set_property -dict "PACKAGE_PIN D17 IOSTANDARD LVCMOS33" [get_ports "vauxn8"];  # "XADC-AD8N-R"
set_property -dict "PACKAGE_PIN D16 IOSTANDARD LVCMOS33" [get_ports "vauxp8"];  # "XADC-AD8P-R"

Do you have any clue on what might be causing this? thanks!
Posts: 2

Re: Doesn't XADC get along with Xillybus?

Postby support »


There is no reason in the world why Xillybus and the XADC would get in each other's way. Xillybus has been used successfully to sample data from the XADC unit in projects that I'm personally aware of.

You did right in posting this question in Xilinx' forum, and indeed, you should investigate the signals further using an ILA as was suggested there: ... d-p/780788

Posts: 777

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