nvidia tx2 video processing

Questions and discussions about the Xillybus IP core and drivers

nvidia tx2 video processing

Postby Guest »

We want to use xillybus to communicate with nvidia tx2 board. It uses HMP Dual Denver and Quad ARMĀ® A57 (two cpu) . Can you confirm that xillybus supports tx2?

Also, we have some confusion about our project and xillybus. Let's say, we created a raw video stream from fpga and want to process it in the tx2. The software in tegra is already written and we do not want to change it. It takes raw stream from pipe( dev/video0 ). If we use xillybus can we take video by reading it from /dev/xillybus_read_32 (just changing the pipe) or we have to write layer that takes from pcie and makes canges and gives it to another pipe? My actual question is can we directly read continuous stream from the xillybus pipe or we need to make requests?

Re: nvidia tx2 video processing

Postby support »


Xillybus works on any Linux platform that supports PCIe properly. Nvidia ARM processors have been used with no issues for several years, but I don't keep a track on exactly which -- as this it pointless. It just works.

As for the pipe -- /dev/xillybus_read_32 (or any other name you may choose) is simply a pipe of the data that you've pushed into the FIFO on the FPGA side, and its I/O interface follows common UNIX conventions for reading from a file. So if you just open the device file and read from it like any device file, it's fine.

Note however that per UNIX convention, a read() call may return less bytes than required, and Xillybus' device files follow this. The Linux Programming Guide at the website's documentation section elaborates on this. As far as I know, a read from /dev/video0 doesn't return with a partial read, so there might be a difference there.

Also, I suppose you have a lot of ioctl()s on the /dev/video0 file, that don't apply on a Xillybus device file.

So it seems like some minor changes are due, but in principle it will be the same.

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