advice for HW debug if porting xillybus demo bundle

Questions and discussions about the Xillybus IP core and drivers

advice for HW debug if porting xillybus demo bundle

Postby Guest » Wed Dec 13, 2017 7:54 pm

Hi, dear Xillybus elites,

In general, while you happen to something weird and need to debug the xillybus HW, do you add ILA IP into the demo bundle project and use JTAG for monitor via ILA ?
In standalone FPGA, we use ILA for embedded internal signal debugging. But when use of xilinux demo bundle with Ubuntu running, I need your experience sharing when it requires to debug some internal signals. Does ILA works with xillybus demo bundle in FPGA ? Thanks
Guest
 

Re: advice for HW debug if porting xillybus demo bundle

Postby support » Thu Dec 14, 2017 3:02 am

Hello,

There is no conflict between ILA and Xillybus, so you may use it to debug an FPGA project including Xillybus like any FPGA project.

Note that Xillybus itself is often handy for debugging, as it can be used to transport debug data easily to the host (and at a considerably higher rate).

Regards,
Eli
support
 
Posts: 615
Joined: Tue Apr 24, 2012 3:46 pm

Re: advice for HW debug if porting xillybus demo bundle

Postby Guest » Thu Dec 14, 2017 7:00 pm

Yes, I see. But we're debugging the HW logic which happens UIO random read/write errors in the the customized bus wrapper b/w xillybus-lite and HLS IP in the xillybus demo bundle project. It needs LA to probe internal signals. Or do you have better debugging solution for such issue ?
Guest
 

Re: advice for HW debug if porting xillybus demo bundle

Postby support » Sun Dec 17, 2017 8:24 am

Hello,

As I said, there's no problem using ILA with Xillybus.

Regards,
Eli
support
 
Posts: 615
Joined: Tue Apr 24, 2012 3:46 pm


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