Hi, dear support
I'm new to Xillybus IP and would like ask the following basic questions which is the use case of my design.
Spec : Develop a FFT IP on ZYBO FPGA with Ubuntu Linux
Use case 1 Functional mode : FFT fetches the data from either DRAM or SRAM in PL for input and then write back to either DRAM or SRAM in PL after processing
Use case 2 Self-Test mode : Host writes data to FFT's buffer for input. After processing, FFT write back to either DRAM or PL's sram and notify Host to read back or CPU pools if FFT is done.
Question : For use case 1, FFT needs the capability of DMA to read/write memory-mapped regions. Can Xillybus IP fulfill the DMA requirement when integrated with my FFT IP core ? If yes, are there any example or doc of Xillybus IP demo example to trace ?
Thanks