ip and GPIO

Questions and discussions about the Xillybus IP core and drivers

ip and GPIO

Postby Guest » Wed Aug 22, 2018 2:00 pm

Hi,

I am new to xillibus, using a ZedBoard. And I have some things that aren't clear, that I would be glad if you can help me.
I have installed the xillinux, but i can not understand how do I control the GPIO of the linux distribution and the FPGA.
Should I implement the VHDL design (the design at the site called boot partition kit) using the ISE/Vivado (because when I try to do so, it failed)? If I'm changing the design (the main VHDL code, to do any operations) , Do I need to change any file in the SD card? how do I call the program?
Can I use any design and just add the FIFO components? or if I am just trying to implement any other design would it be an issue when the xillinux already installed?
Is there a way to access the GPIO directly from xilliunx?
Guest
 

Re: ip and GPIO

Postby support » Wed Aug 22, 2018 2:11 pm

Hello,

Yes, the GPIO can be accessed directly from within the Linux system. A simple example for a similar board (Zybo) is on this page:

http://billauer.co.il/blog/2014/07/bash-gpio-xillinux/

That's a good solution if the toggling rates are fairly low. Otherwise you may use Xillybus or Xillybus Lite to communicate with your own logic on the PL (FPGA) side, and control the GPIO pins from logic. The Getting Started guide for Zynq has the relevant info.

Regards,
Eli
support
 
Posts: 623
Joined: Tue Apr 24, 2012 3:46 pm

Re: ip and GPIO

Postby Guest » Wed Aug 22, 2018 3:05 pm

Hi Eli,
what do you mean "and control the GPIO pins from logic"? do you mean from the mem_read/write files?
Guest
 

Re: ip and GPIO

Postby adir » Wed Aug 22, 2018 3:41 pm

HI Eli,
Thank you for your answer.
what do you mean about "and control the GPIO pins from logic"?
adir
 
Posts: 1
Joined: Wed Aug 22, 2018 1:29 pm

Re: ip and GPIO

Postby support » Fri Aug 24, 2018 5:55 am

Hello,

Please refer to "Getting started with Xillinux for Zynq-7000", section 5.4, "Taking over GPIO I/O pins for PL logic":

http://xillybus.com/downloads/doc/xilly ... d_zynq.pdf

There's also section 5.1, "Integration with custom logic".

I also suggest following the pointers given in section 4.7 in the same guide, "Taking it from here".

For simple communication with the PL part, maybe Xillybus Lite will do the trick:

http://xillybus.com/xillybus-lite

Regards,
Eli
support
 
Posts: 623
Joined: Tue Apr 24, 2012 3:46 pm


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