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Can user extend the space of Xillybuslite memory map to 128K

PostPosted: Tue Oct 30, 2018 8:16 am
by Guest
Hi, dear support,

We are user of Xilinux demo. However, for the spec of new project, it needs to allocate 128KB memory space for the Xillybus-lite slave module. As you know, can user adjust the address editor of Xillybus lite module to 128KB in Vivado GUI ? Or what's the most easiest way to achieve ? For example, user can modify specific file instead of Vivado GUI for Xilinux demo. I just want to know if there is any special limitation for Xilinux demo.

Thanks

Re: Can user extend the space of Xillybuslite memory map to

PostPosted: Tue Oct 30, 2018 9:53 am
by support
Hello,

For a larger memory map, you should indeed update the segment's size in Vivado, and make the corresponding change in the relevant device tree entry.

It's probably a good idea (or required?) to change the base address as well (in Vivado and the device tree) so that the address is aligned to the overall size.

Regards,
Eli