Spartan 6 demo bundle can't regenerate cores

Questions and discussions about the Xillybus IP core and drivers

Spartan 6 demo bundle can't regenerate cores

Postby whennig » Thu Sep 17, 2020 7:37 pm

Hello,

I downloaded the Spartan 6 demo bundle and tried to compile, following the steps in the Getting Started guide. In section 3.5 it mentions that the cores need to be regenerated and there will be a warning popup. I see a slightly different message (it can't find "pcie_synth.v") and when I click "yes" to regenerate, it simply gives up.

The console says
Started : "Regenerate Core".
Process "Regenerate Core" failed

I'm using ISE 14.5, but I also tried 13.4 on the same PC, and 14.5 on another PC with the same result. I looked for the files in the zip file, but they are not there. Any suggestion would be appreciated.

Thanks,

Wolfgang
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Re: Spartan 6 demo bundle can't regenerate cores

Postby support » Thu Sep 17, 2020 7:46 pm

Hello,

It sounds like you attempted to regenerate the cores as outlined in section 3.4 in the said guide. However this should not be done when targeting Spartan 6 devices (as it says at the beginning of that section).

Regards,
Eli
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Re: Spartan 6 demo bundle can't regenerate cores

Postby whennig » Fri Sep 18, 2020 8:46 pm

Hi Eli,
Thanks for the quick answer. I'm not intentionally trying to regenerate the core.

I skipped sections 3.3 and 3.4. All I did in ISE after opening the xise file was to click “Generate Programming File” or 'Synthesis"
ISE then gives me the message that it's trying to regenerate the core, but it fails as described below.
My guess is that the cores are outdated compared to the supported version in my ISE, and it wants to do something about that,.

So, if I actually go into "Manage cores" and look at the 2 fifo cores , they are described as

" this core was generated for [spartan 6] on 27-Mar-2013
type FIFO generator
version 6.2
identifier xilinx.com:ip:fifo:6.2 this core does not exist within the repository. a more recent version is available.
<actually bold>
"
below that I can select "upgrade to latest version and regenerate under current settings"
which upgrades them to version 9.3

The pcie core has a similar message, just different versions -- it's now upgraded to version 2.4

When I now try to compile, ISE does not give me the regeneration popups any more

However, a bunch of errors type 267 occur for xillybus.v lines 98-118,
"cannot find PORT trn_rd [and similar] on this module"
These lines are the ports to the pcie core.

When I find pcie.v from the generated core, I see these nets declared as wires within the pcie module, but the module's I/O ports are AXI signals and a lot of fc_ and cfg_ lines, no trn_ lines.
There is a comment in xillybus.v just above that about a perl snippet to turn I/O ports to wires "so only those that are really connect something become real ports". Do I have make those changes?

This is again using ISE 14.5

Thanks for your help,

Wolfgang
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Re: Spartan 6 demo bundle can't regenerate cores

Postby support » Fri Sep 18, 2020 9:01 pm

Hello,

The procedure for setting up the demo bundle has been done by literally hundreds of people on a diverse range of ISE versions, and I can't recall any problem of the sort you have. In other words, it should be really easy, and you definitely shouldn't need to make any interventions. All that you need to do is written in the instructions.

You do start from a fresh, unzipped, demo bundle each time, I suppose? Could it be that you put the files on the desktop or some other non-trivial place? Try with C:\mydir\ or something like that.

This way or another, the solution to this is unlikely to be a clever one. Odds are that this will end with working around some peculiarity with your operating system's setting. Maybe the locale. Something of that sort.

Regards,
Eli
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Re: Spartan 6 demo bundle can't regenerate cores

Postby Guest » Mon Sep 21, 2020 5:19 pm

Restarting with a fresh demo bundle or changing directory did not help.

However, when going back to ISE 12.2, the version mentioned in the readme file, things compile as expected.
(This is again on a different PC running up-to-date Windows 10)

I can also edit and regenerate the pcie core for clock and pinout without problems.

So far so good :)
Guest
 

Re: Spartan 6 demo bundle can't regenerate cores

Postby support » Mon Sep 21, 2020 6:06 pm

Hello,

Glad that you got it sorted out. I think it's the "different PC" that did the trick. The bundle is well known to build properly on more recent ISE versions, including the most recent one. There would have been a flood of complaints otherwise.

As a side note, I suggest checking if the Core Generator works at all: Try Project > New Source... and pick IP (Core Generator & Architecture Wizard) as the type. Pick any name, and then select a mainstream IP. For example, FPGA Features and Design > Clocking > Clocking Wizard. Click Next and Finish, and when the Wizard's window appears, just click the Generate button. If this doesn't complete successfully, you should be checking your ISE installation, in particular if there isn't some issue with Java stuff. The exact error is likely to appear in the coregen.log file, and odds are that it's some Java exception.

Regards,
Eli
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