Retargeting XL core to different evaluation board.

Questions and discussions about the Xillybus IP core and drivers

Retargeting XL core to different evaluation board.

Postby mwayne » Tue May 11, 2021 3:04 pm


I downloaded the XL version evaluation bundle and ran the xillydemo-vivado.tcl script to create the project. The project is targeted for a Xilinx KC705 evaluation board, but I am using a different FPGA (Kintex 7 410T FFG676-3), so I changed the target device under project settings, and ran report_ip_status.

Since all the demo bundle's IPs are targeted for a different chip, I had to retarget each of them. The FIFOs work fine, but the PCIe IP does not retarget correctly. It reverts back to a x1 lane IP. I was able to compare the settings between the original KC705 and my board, and manually input the changes. At this point the bit file compiles, but now Xillybus isn't even recognized on the PCIe bus as a device.

Do the XL bundles require a different driver, or some other step to retarget the device?

Thank you.
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Re: Retargeting XL core to different evaluation board.

Postby support » Tue May 11, 2021 3:22 pm


All revisions of Xillybus are covered by the same driver. Odds are that the device wasn't recognized by the host computer at all, or with another pair of Vendor ID / Product ID. Vivado's PCIe block has a thing about changing these IDs when other changes are made.

Using lspci in Linux or Device Manager in Windows are likely to shed light on this.

Regardless, the easier way to change the part number is in the Tcl script. This is likely to set up the project correctly to begin with.

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