Simulation error for xillinux-eval-zedboard-2.0c in vivado

Questions and discussions about Xillinux

Simulation error for xillinux-eval-zedboard-2.0c in vivado

Postby kevin » Wed Dec 13, 2017 3:28 am

I am having simulation error for xillinux-eval-zedboard-2.0c in vivado.

The strange thing is that I could synthesize the demo bundle coding successfully, but not with simulation.

Could anyone advise ?

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kevin
 
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Re: Simulation error for xillinux-eval-zedboard-2.0c in viva

Postby support » Thu Dec 14, 2017 3:25 am

Hello,

Please refer to section 5 of the Xillybus FPGA designer’s guide:

http://xillybus.com/downloads/doc/xillybus_fpga_api.pdf

The main idea is that simulation of the entire system isn't supported, as it's rather pointless. Even if you got the simulation up and running, you wouldn't be able to simulate the entire operating system on the processor.

Regards,
Eli
support
 
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