Endpoint writes to Root Complex

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Endpoint writes to Root Complex

Postby Guest » Mon Jul 01, 2013 7:34 pm

Your articles have been very helpful. I have another question that I can't find an answer too.

How does an endpoint get valid host CPU addresses to write too? No where in the enumeration process does it indicate an address range that an endpoint is allowed to write too. Do I have to post a mem write to an agreed upon endpoint address that contains a host base address for endpoint memory writes or did I miss something in the configuration/enumeration process?

It seems strange that an endpoint would be allowed to just write anywhere in host memory space.

thanks again,

gary
Guest
 

Re: Endpoint writes to Root Complex

Postby support » Mon Jul 01, 2013 7:44 pm

Hi,

There is no specification on how the peripheral knows the addresses it can write to. But the common (well, probably only) way it's done is that the host informs the peripheral's logic about the bus address range it's allowed to write to by writing to registers in the endpoint's BAR space. How exactly is implementation specific.

And yes, in practice, any endpoint can write to any address on the bus (including to the BAR addresses of other endpoints for peer-to-peer communication). Relatively recent memory controllers have a unit called IOMMU, which translates and possibly denies access to certain memory regions, but these are usually not activated on common desktop computer. So yes, a faulty endpoint can easily trash the entire system.

Eli
support
 
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Joined: Tue Apr 24, 2012 3:46 pm

Re: Endpoint writes to Root Complex

Postby Guest » Mon Jul 01, 2013 8:38 pm

Thanks!, that clears that up and yes I have an MMU for inbound mem writes that I will have to use.

gary
Guest
 


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