Hi Eli and all,
Is it possible to create a software accessible register using Xillybus? I am successfully transferring data from my C++ program to a FIFO using the respective device file's name /dev/xillybus/write_32. In a similar manner, could I use Xillybus to pass an integer variable in my C++ program to a register in my verilog code? If this is possible, what changes would need to be made in verilog code associated with the Xillybus demo bundle that I am using? Thank you very much