by Guest »
we are using xilinx PCIe example design as EP and sybios TM processor as RP. without DMA we are able to read the data from EP bram. but with DMA write is proper, and when read back, able to see proper data on ILA but on console it is printing as 0 or 0XF (32bit) We are using 3-DW format. in ep, bram locations are incremented on every transaction without PCIe 32bit start address and this increment is same for both read and write. but with different counters. so question is , do we need to maintain the same start address while sending the read data from EP ?
we are using xilinx PCIe example design as EP and sybios TM processor as RP. without DMA we are able to read the data from EP bram. but with DMA write is proper, and when read back, able to see proper data on ILA but on console it is printing as 0 or 0XF (32bit) We are using 3-DW format. in ep, bram locations are incremented on every transaction without PCIe 32bit start address and this increment is same for both read and write. but with different counters. so question is , do we need to maintain the same start address while sending the read data from EP ?