by support »
Hello,
If all you want is to send the data towards the FPGA and read exactly the same data back from it, no changes are required on the logic side.
However please note that you should have different threads or processes running simultaneously for reading and writing. In particular, don't expect to write all data in one go, and only after that read it back. It's a common mistake to write programs that write first, read later.
You will get away with this mistake if the DMA buffers are large enough to contain all data in flight, but I'm not sure the demo bundle supplies that. You can always create a custom IP core if you really insist on write first, read later. Anyhow, the correct and practical way is simultaneous write and read.
Regards,
Eli
Hello,
If all you want is to send the data towards the FPGA and read exactly the same data back from it, no changes are required on the logic side.
However please note that you should have different threads or processes running simultaneously for reading and writing. In particular, don't expect to write all data in one go, and only after that read it back. It's a common mistake to write programs that write first, read later.
You will get away with this mistake if the DMA buffers are large enough to contain all data in flight, but I'm not sure the demo bundle supplies that. You can always create a custom IP core if you really insist on write first, read later. Anyhow, the correct and practical way is simultaneous write and read.
Regards,
Eli