Regarding Bandwidth calculation Of PCIe 4

[Guest]

Can you please share your thoughts on how to calculate the bandwidth after each layer such as transaction layer, data link layer, physicial layer if we know that the device is PCIe 4 with x1 lane.

[support]

Hello,

The information is on this page, for example:

http://xillybus.com/doc/xillybus-bandwidth

The physical layer of PCIe Gen4 runs at 16 GT/s. The coding overhead is relative low in Gen4, so one can divide it by 8 to get a rough number of the raw data rate: 2 GB/s.

I can't say much about the data link rate (why does that matter?), but experience shows that the actual payload rate is typically 80% of the raw data rate. So for a Gen4 lane, I would expect that to be around 1600 MB/s of payload data. The actual figure may vary slightly. You won't get significantly higher than that, and if your result is significantly lower than that, the implementation of the TLP packet exchange is likely to be flawed.

Regards,
Eli