Root to Root PCIe
Posted:
Hello,
Excellent information, thanks.
The scenario I have is a Freescale processor (Root) and a Xillinx FPGA (EP). The Freescale processor just sends out TLPs to read/write into memory on FPGA side. However, I'm trying simulate the FPGA with a Linux machine. The problem is that the Linux machine acts like a Root as well. My ideas are to use some sort of non-transparent bridge in between the two Roots or some sort of multi-root switch. Another problem is that I cannot install many drivers on the Freescale processor to accommodate many hardware modules. I would like to just directly send TLPs from the Freescale to the Linux machine at addressable space. Have you ever heard of this type of scenario being attempted? If so, could you please let me know. Or if you have any other ideas for me that would be great. Thank you.
Felix
Excellent information, thanks.
The scenario I have is a Freescale processor (Root) and a Xillinx FPGA (EP). The Freescale processor just sends out TLPs to read/write into memory on FPGA side. However, I'm trying simulate the FPGA with a Linux machine. The problem is that the Linux machine acts like a Root as well. My ideas are to use some sort of non-transparent bridge in between the two Roots or some sort of multi-root switch. Another problem is that I cannot install many drivers on the Freescale processor to accommodate many hardware modules. I would like to just directly send TLPs from the Freescale to the Linux machine at addressable space. Have you ever heard of this type of scenario being attempted? If so, could you please let me know. Or if you have any other ideas for me that would be great. Thank you.
Felix