by support »
Hello,
Your understanding is correct, as far as the BAR addressing goes. In other words, you've described the part where the CPU writes or reads data from the memory segments that is allocated to the PCIe device. These memory segments are typically used to configure the device, send instructions and obtain status information. In this kind of operations, the PCIe device acts as a slave, i.e. it fulfils requests by the CPU.
For the DMA interface with a PCI/PCIe device, the driver software allocates buffers in RAM, and informs the PCIe device on their physical addresses (i.e. before possible MMU remapping). This information, as well as commands on what to do with them, is typically conveyed through the BAR address interface.
This allows the PCIe device to access these buffers in memory directly, by issuing bus commands, just like the CPU does. In this respect, the PCIe device is the bus master (hence direct memory access -- DMA).
So to answer the question in this thread's topic -- PCIe allows the capability to perform DMA, yes. But it's perfectly fine to have a DMA device that doesn't take advantage of this feature (for simple, low-bandwidth applications in particular).
Regards,
Eli