Hello,
I'm learning about Zybo Zynq-7000 ARM/FPGA SoC Trainer Board.
I'm doing loopback video from software-FPGA-software.
I use OpenCV to create mat of an video AVI format. I use fifo 32x512 loopback (default) from xillinux-eval-zybo-2.0a.
My loopback system is generated from xillinux-eval-zybo-2.0a. I use Vivadl 2016.1
Problem:
My output frame is deviated from the original. Sometimes the loopback frame is right at the first few seconds, but then there is a deflection.
I do not understand what caused this. I only use the existing loopback system and do not edit anything
Here is my result (frame window is original video, frame1 is loopback video).
My job is just sending data down to the fpga and retrieving the data. I can not see the error in this case.
Video input 320*240 pixels. An error occurred at the beginning
Crop video to 200*130. Initially given the right result, the result is wrong later.
Period for erroneous results are not fixed. There are 4s, sometimes 20s, sometimes 60s
My code on xillinux
http://txt.do/dr0qt
My module xillydemo.v
http://txt.do/dr0qj