Hello,
i want to get a hard real time communication between FPGA and Linux Host through PCIe. I used the Xillybus example succsessfully. Now i want to upgrade to real time communication with the RTAI module. im new to this theme and maybe you can help me with some questions.
i have 3 ideas, but maybe some are rubbish.
1: Create a real time fifo from the RTAI Module to the /dev file of xillybus.
2: Create a real time fifo from the RTAI Module to the Xillyus_pcie Modul
3: Somehow insert the Xillybus_core and Xillybus_pcie code in a RTAI Module
Maybe someone can tell, what way i shoud focus on? Or maybe there is some better way to get it running?
Regards,
Thomas