Dear Xillybus Team,
I have an X4 Gen2 PCIe interface in a Xilinx FPGA board. After modifying your Demo bundle and successfully installing the windows driver, now I am going to test the functionality using part 4.3 of " Getting started with Xillybus on a Windows host" however nothing happened: I tried to track those two fifos input output, wren and rden in both fifos never goes high.
My desired test at the end will be testing the maximum achievable rate of streaming from FPGA to the host. I will connect a free run 32-bit 250Mhz counter to the input of FIFO (I guess it should be connected to the xillybus_read_32 interface) and saving it as a binary file at the host side.
Could you please help me?
Regards
Mim