The Xillybus Forum

Hi Eli,

One more question about the latency of data transmission.

When generating the data from IP core factory, it showed 5ms buffer.

Like this:
(FPGA to host) 32 bits 1280 MB/s Yes Data acquisition / playback (5 ms)

Not sure what does this 5ms stand for? I saw in the documents that the transmission latency of xillybus is around few microseconds instead of milliseconds.

Thanks!

Best,
Chongxi

Hi,

This figure (5 ms in your example) is explained in the stream's edit form: It's the approximate buffering time, and it has nothing to do with latency. The help button in the edit form supplies more information, as well as this page:

http://xillybus.com/doc/xillybus-latency

By the way, a 32 bit interface has no chance of giving 1280 MB/s, because the interface uses a clock of 250 MHz at most, so there's a limit of 1 GB/s, but effectively you'll usually get something like 800 MB/s. If you're using a Revision B core, you need to make the data vector wider, or add more streams to get an aggregate bandwidth > 800 MB/s.

Regards,
Eli

Wow! Thank you very much for telling me that. Really helpful!

Best,
Chongxi