Dear Support,
For the project that I'm doing I am using the xillinux 2.0, and I need to transfer flags from the processor to the PL, so I've try to use the Xillybus Lite, for transferring small amount of data.
I read the manual ( http://xillybus.com/downloads/doc/xillybus_lite.pdf ) and try to use the demo (i'm not strong in C programming so I have some questions ) .
I don't understand how is the address is selected. and how can I change/control it. I saw that the 4 numbers are writing (0 to 3) to the first address (dose every 8 bit are one digit and all the 4 digits are one memory register or 32 bit? or every digit is the address and the number that writing in the memory?) but when I try to use the information from the PL like suggested at the manual couldn't access it (translate it to VHDL):
proress(user_clk)
if (rising_edge(user_wren) and user_addr(6 downto 2]="00101:) then
myregister <= user_wr_data;
I thought that my only issue that is the fact that I don't understand the address, so I've try to use "don't care" insted of specified address. and still no good.
proress(user_clk)
if (rising_edge(user_wren) and user_addr(6 DOWNTO 2)="-----")
myregister <= user_wr_data;
Thanks,
Adir