Hi,
I'm new to this whole system (Zynq, Xillinux, HLS), but have done some HDL stuff before.
I've gone through the following:
http://xillybus.com/downloads/doc/xillybus_block_design_flow.pdf
and am trying now to do something (slightly) similar with some external hardware connected to a PMOD on my zedboard.
I get how to talk to the GPIO through Linux, but would need to have this take place on the PL side instead of the PS. The flow would be as follows:
External hardware generating some data -> PMOD GPIO -> PL doing some math on the inputs -> signal to PS when calculation is done.
From everything I have read in the tutorials, documents, and forums, I still do not know how to go about this....
1. How do I modify the design so that a PMOD (ex. JA) is routed to the PL and not the PS?
2. How would I then route the "freed up" PMOD into the Xillybus block as an input? It would be an input to a block like the tutorial in the link, which would then send its data out to "to_host_read_32".