I have been working on an FPGA board for a while, and I have only used simple memory map read/write to communicate from host to FPGA. As reads are very inefficient this way, I have to use DMA for my new project. I have tried everything I could find and think of, yet it doesn't work. So, my first question is that if DMA from FPGA to Host is feasible on any architecture?
To be more specific, I am using Terasic DE2-i150 board. You can see the block diagram on page 4 of this document: http://www.intel.com/content/dam/www/pu ... ev-kit.pdf
As you can see, the CPU memory is directly connected to CPU, while I have seen other architectures that memory is connected to the root complex. I don't understand if it matters or not. Can I still do DMA operations from FPGA to CPU memory, if memory is not connected to the root complex?!
If it is not possible, then I'm doomed. But if its, then I would provide some information about my implementation and hopefully get a direction to go on.
Thanks,
M.P.