The Xillybus Forum

Guest wrote:I just wanted to point out that section 5.5 of the xillybus_getting_started_windows doc points to section 6.6 of xillybus_host_programming_guide_windows but that section does not exist

Thanks for that correction. It should refer to section 6.5, as it does now. Section 6.6 is the same section in the guide for Linux (both are called "Coprocessing / Hardware acceleration").

Regards,
Eli

Thanks for the advice! I will try with just the _read() and _write functions first
they seem much simpler to work with anyway

I just wanted to point out that section 5.5 of the xillybus_getting_started_windows doc points to section 6.6 of xillybus_host_programming_guide_windows but that section does not exist

Hello,

First of all, section 4.7 of the said guide refers to the software RAM FIFO. There's a very slim chance that you actually need it. It's much easier to read and write directly to the device files (or objects in Windows) and let the DMA buffers do the cushioning.

Speaking of guidelines in the documentation, I suggest looking at section 5 of the Getting started with Xillybus on a Windows host, which discusses best practices for high bandwidth applications. In particular section 5.5 encourages multi-threading programming.

Now to your question: Yes, multi-threading is a good idea. If your application can be organized fairly naturally, so each Xillybus stream has its own thread that either writes or reads from it, that will be beneficial. And as I just mentioned, skip the thing with the RAM FIFO, at least at first.

For example, if you have some part of your program that prepares data that need to be transmitted to the FPGA and then transmits it, a simple loop in a dedicated thread will most likely do the job well: When the time comes to write the data, just use _write() (but be sure to check the return value and possibly re-invoke _write() if not all data has been written, as suggested in the programming guide). Try this first. Odds are that you won't need to go any further.

Regards,
Eli

Hi all,

I have built and tested a demo bundle for Xillybus and want to implement it on our system but I wanted to get some advice on how to proceed first,
The end goal is to have 2 separate data streams from the fpga to the pc, one stream would send data to be processed by the CPU then the other stream would dump a bunch of data to be processed by the GPU. Reading section 4.7 of the windows host programming guide it warns that the processes are not reentrant.

Is it possible to set up the code on the windows side to have 4 threads (two separate read and two separate write threads)? Is it even worth it to do so? Or should I just have one read thread and one write thread and some sort of condition to tell my code the size of the data and where to send it depending on which stream it is?

Thanks in advanced